FreeBSD/src 3d13571 (r320392) — sys/powerpc/booke pmap.c
Disable interrupts when updating the TLB Without disabling interrupts it's possible for another thread to preempt and update the registers post-read (tlb1_read_entry) or pre-write (tlb1_write_entry), and confuse the kernel with mixed register states. MFC after: 2 weeks
| Delta | File | |
|---|---|---|
| +10 | -0 | sys/powerpc/booke/pmap.c |
| +10 | -0 | 1 files |
