Linux/linux a048a07 — arch/powerpc/include/asm exception-64s.h feature-fixups.h, arch/powerpc/kernel security.c exceptions-64s.S
powerpc/64s: Add support for a store forwarding barrier at kernel entry/exit
On some CPUs we can prevent a vulnerability related to store-to-load
forwarding by preventing store forwarding between privilege domains,
by inserting a barrier in kernel entry and exit paths.
This is known to be the case on at least Power7, Power8 and Power9
powerpc CPUs.
Barriers must be inserted generally before the first load after moving
to a higher privilege, and after the last store before moving to a
lower privilege, HV and PR privilege transitions must be protected.
Barriers are added as patch sections, with all kernel/hypervisor entry
points patched, and the exit points to lower privilge levels patched
similarly to the RFI flush patching.
Firmware advertisement is not implemented yet, so CPU flush types
are hard coded.
Thanks to Michal Suchánek for bug fixes and review.
Signed-off-by: Nicholas Piggin <npiggin at gmail.com>
Signed-off-by: Mauricio Faria de Oliveira <mauricfo at linux.vnet.ibm.com>
Signed-off-by: Michael Neuling <mikey at neuling.org>
Signed-off-by: Michal Suchánek <msuchanek at suse.de>
Signed-off-by: Michael Ellerman <mpe at ellerman.id.au>
Signed-off-by: Linus Torvalds <torvalds at linux-foundation.org>
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