LLVM/llvm 361706llvm/trunk/lib/Target/X86 X86ISelLowering.cpp, llvm/trunk/test/CodeGen/X86 vector-sext-widen.ll vector-sext.ll

[X86] lowerBuildVectorToBitOp - support build_vector(shift()) -> shift(build_vector(),C)

Commonly occurs in sign-extension cases

LLVM/llvm 361705llvm/trunk/include/llvm-c Object.h, llvm/trunk/lib/Object Object.cpp

[LLVM-C] Add Accessor for Mach-O Universal Binary Slices

Summary: Allow for retrieving an object file corresponding to an architecture-specific 
slice in a Mach-O universal binary file.

Reviewers: whitequark, deadalnix

Reviewed By: whitequark

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60378

LLVM/llvm 361704llvm/trunk/lib/Target/X86 X86ISelLowering.cpp, llvm/trunk/test/CodeGen/X86 fmaxnum.ll fminnum.ll

[X86] Combine fminnum/fmaxnum with non-nan operand to fmin/fmax

If we have a known non-nan operand, place it in the second operand
of fmin/fmax that is returned if either operand is nan.

Differential Revision: https://reviews.llvm.org/D62448

LLVM/llvm 361703llvm/trunk/lib/Analysis LazyValueInfo.cpp, llvm/trunk/test/Transforms/CorrelatedValuePropagation basic.ll

[LVI][CVP] Add support for saturating add/sub

Adds support for the uadd.sat family of intrinsics in LVI, based on
ConstantRange methods from D60946.

Differential Revision: https://reviews.llvm.org/D62447

LLVM/llvm 361702llvm/trunk/test/CodeGen/X86 vector-sext-widen.ll vector-sext.ll

[X86][SSE] vector-sext - cleanup prefix lists

Add X32-SSE common prefix to merge some checks

LLVM/llvm 361701llvm/trunk/test/CodeGen/X86 vector-reduce-umin.ll vector-reduce-smin-widen.ll

[SelectionDAG] define binops as a superset of commutative binops

The test diffs show improved vector narrowing for integer min/max opcodes because
those were all absent from the list. I'm not sure if we can expose functional diffs
for all of the moved/added opcodes though.

It seems like we are missing an AVX512 opportunity to use 256-bit ops in place of
512-bit ops on some tests/targets, but I think that can be a follow-up.

Preliminary steps to make sure the callers are not misusing these queries:

Differential Revision: https://reviews.llvm.org/D62191

LLVM/llvm 361700llvm/trunk/test/CodeGen/X86 fmaxnum.ll fminnum.ll

[X86] Add tests for min/maxnum with const operand; NFC

LLVM/llvm 361699llvm/trunk/test/Transforms/LoopVectorize if-pred-stores.ll

[LoopVectorize] Fix test by regenerating checks

LLVM/llvm 361698llvm/trunk/lib/IR ConstantRange.cpp, llvm/trunk/lib/Transforms/Scalar CorrelatedValuePropagation.cpp

[CVP] Remove unnecessary checks for empty GNWR; NFC

The guaranteed no-wrap region is never empty, it always contains at
least zero, so these optimizations don't ever apply.

To make this more obviously true, replace the conversative return
in makeGNWR with an assertion.

LLVM/llvm 361697llvm/trunk/test/CodeGen/ARM crash-greedy.ll, llvm/trunk/test/CodeGen/Hexagon bit-visit-flowq.ll reg-scavengebug.ll

[NFC] Make tests more robust for new optimizations

LLVM/llvm 361696llvm/trunk/lib/CodeGen/SelectionDAG LegalizeVectorTypes.cpp, llvm/trunk/test/CodeGen/PowerPC ftrunc-legalize.ll

[SelectionDAG] soften assertion when legalizing narrow vector FP ops

The test based on PR42010:
...may show an inaccuracy for PPC's target defs, but we should not
be so aggressive with an assert here. There's no telling what out-of-tree
targets look like.

LLVM/llvm 361695llvm/trunk/test/Analysis/ValueTracking select-pattern.ll, llvm/trunk/test/Transforms/CallSiteSplitting split-loop.ll

[NFC] Update test checks

LLVM/llvm 361694llvm/trunk/test/Transforms/CorrelatedValuePropagation basic.ll

[CVP] Add tests for saturating add/sub ranges; NFC

LLVM/llvm 361693llvm/trunk/lib/Analysis LazyValueInfo.cpp, llvm/trunk/test/Transforms/CorrelatedValuePropagation overflow_predicate.ll

[LVI][CVP] Calculate with.overflow result range

In LVI, calculate the range of extractvalue(op.with.overflow(%x, %y), 0)
as the range of op(%x, %y). This is mainly useful in conjunction with
D60650: If the result of the operation is extracted in a branch guarded
against overflow, then the value of %x will be appropriately constrained
and the result range of the operation will be calculated taking that
into account.

Differential Revision: https://reviews.llvm.org/D60656

LLVM/llvm 361692llvm/trunk/lib/Analysis LazyValueInfo.cpp

[LVI] Extract helper for binary range calculations; NFC

LLVM/llvm 361691llvm/trunk/lib/Target/X86 X86FixupLEAs.cpp, llvm/trunk/test/CodeGen/X86 mul-constant-i64.ll avx512vl-intrinsics-upgrade.ll

[X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r 

INC/DEC is really a special case of a more generic issue. We should also turn leas into 
add reg/reg or add reg/imm regardless of the slow lea flags.

This also supports LEA64_32 which has 64 bit input registers and 32 bit output registers. 
So we need to convert the 64 bit inputs to their 32 bit equivalents to check if they are 
equal to base reg.

One thing to note, the original code preserved the kill flags by adding operands to the 
new instruction instead of using addReg. But I think tied operands aren't supposed to have 
the kill flag set. I dropped the kill flags, but I could probably try to preserve it in 
the add reg/reg case if we think its important. Not sure which operand its supposed to go 
on for the LEA64_32r instruction due to the super reg implicit uses. Though I'm also not 
sure those are needed since they were probably just created by an INSERT_SUBREG from a 
32-bit input.

Differential Revision: https://reviews.llvm.org/D61472

LLVM/llvm 361690llvm/trunk/lib/Target/X86 X86SchedSkylakeServer.td X86SchedSkylakeClient.td, llvm/trunk/test/tools/llvm-mca/X86/Broadwell zero-idioms.s

[X86] Add zero idioms to the haswell, broadwell, and skylake schedule models. Add 256-bit 
fp xor to sandybridge zero idioms

This copies the Sandy Bridge zero idiom support to later CPUs. Adding the AVX2 and 
AVX512F/VL instructions as appropriate.

Differential Revision: https://reviews.llvm.org/D62360

LLVM/llvm 361689llvm/trunk/test/tools/llvm-mca/X86/Broadwell zero-idioms.s, llvm/trunk/test/tools/llvm-mca/X86/Haswell zero-idioms.s

[X86][llvm-mca] Add zero idiom tests for Intel CPUs. NFC

This pre-commits tests for D62360

LLVM/llvm 361688llvm/trunk/lib/CodeGen/SelectionDAG InstrEmitter.cpp, llvm/trunk/lib/Target/AMDGPU SIFixSGPRCopies.cpp SIISelLowering.cpp

Revert r361644, "[AMDGPU] Divergence driven ISel. Assign register class for cross block 
values according to the divergence."

Broke sanitizer bots:

LLVM/llvm 361687clang-tools-extra/trunk/clangd/refactor/tweaks CMakeLists.txt

[clangd] tweaks: Add clangBasic dependency to LINK_LIBS

This is necessary to make builds with `-DBUILD_SHARED_LIBS=ON` work.

LLVM/llvm 361686cfe/trunk/include/clang/AST DeclCXX.h, cfe/trunk/lib/AST DeclCXX.cpp

Permit static local structured bindings to be named from arbitrary scopes inside their 
declaring scope.

LLVM/llvm 361685cfe/trunk/test/Analysis/plugins/CheckerDependencyHandling CMakeLists.txt, cfe/trunk/test/Analysis/plugins/CheckerOptionHandling CMakeLists.txt

Revert "[Analysis] Link library dependencies to Analysis plugins"

This reverts commit r361340. The following builder has been broken for
the past few days because of this commit:


Also revert r361399, which was committed to fix r361340.

LLVM/llvm 361684cfe/trunk/lib/Tooling/Refactoring CMakeLists.txt, cfe/trunk/tools/clang-refactor CMakeLists.txt

Rename clangToolingRefactor to clangToolingRefactoring for consistency with its directory

See "[cfe-dev] The name of clang/lib/Tooling/Refactoring".

Differential Revision: https://reviews.llvm.org/D62420

LLVM/llvm 361683llvm/trunk/lib/DebugInfo/DWARF DWARFUnit.cpp, llvm/trunk/test/DebugInfo/X86 dwarfdump-str-offsets-invalid.s dwarfdump-str-offsets-invalid-3.s

llvm-dwarfdump: Don't error on mixed units using/not using str_offsets

This lead to errors when dumping binaries with v4 and v5 units linked
together (but could've also errored on v5 units that did/didn't use

Also improves error handling and messages around invalid str_offsets

LLVM/llvm 361682cfe/trunk/include/clang/StaticAnalyzer/Core/BugReporter BugReporter.h, cfe/trunk/include/clang/StaticAnalyzer/Core/PathSensitive CoreEngine.h

[analyzer] Add a prunable note for skipping vbase inits in subclasses.

When initialization of virtual base classes is skipped, we now tell the user
about it, because this aspect of C++ isn't very well-known.

The implementation is based on the new "note tags" feature (r358781).
In order to make use of it, allow note tags to produce prunable notes,
and move the note tag factory to CoreEngine.

Differential Revision: https://reviews.llvm.org/D61817

LLVM/llvm 361681cfe/trunk/include/clang/Analysis CFG.h, cfe/trunk/lib/Analysis CFG.cpp

[CFG] Add branch to skip vbase inits when they're handled by superclass.

This patch adds the run-time CFG branch that would skip initialization of
virtual base classes depending on whether the constructor is called from a
superclass constructor or not. Previously the Static Analyzer was already
skipping virtual base-class initializers in such constructors, but it wasn't
skipping their arguments and their potential side effects, which was causing
pr41300 (and was generally incorrect). The previous skipping behavior is
now replaced with a hard assertion that we're not even getting there due
to how our CFG works.

The new CFG element is under a CFG build option so that not to break other
consumers of the CFG by this change. Static Analyzer support for this change
is implemented.

Differential Revision: https://reviews.llvm.org/D61816

LLVM/llvm 361680cfe/trunk/include/clang/AST ExprCXX.h, cfe/trunk/lib/Serialization ASTReaderStmt.cpp

Fix crash deserializing a CUDAKernelCallExpr with a +Asserts binary.

The assertion in setConfig read from the (uninitialized) CONFIG

LLVM/llvm 361679llvm/trunk/lib/Target/AArch64 AArch64RegisterBankInfo.cpp AArch64RegisterBankInfo.h, llvm/trunk/test/CodeGen/AArch64/GlobalISel regbank-fp-use-def.mir

[GlobalISel][AArch64] Make FP constraint checks consider possible use/def banks

In a few places in getInstrMapping, we check if use/def instructions for the
instruction we're mapping have floating point constraints.

We can improve this check and reduce the number of copies in GISel-compiled code
if we make a couple observations:

- For a def instruction, it only matters if the def instruction must always
  output a value stored on a FPR

- For a use instruction, it only matters if the use instruction must always
  only take in values stored in FPRs

This adds two new functions:

- onlyUsesFP
- onlyDefinesFP

Then we can use those when we're checking the uses/defs instead.

Without this patch, the load, unmerge, store, and select in the added test
would have unnecessary copies.

Differential Revision: https://reviews.llvm.org/D62426

LLVM/llvm 361678lld/trunk/test/wasm signature-mismatch-unknown.ll, lld/trunk/wasm InputFiles.cpp SymbolTable.cpp

[WebAssembly] Relax signature checking for undefined functions that are not called 

When function signatures don't match and the undefined function is not
called directly (i.e. only has its address taken) we don't issue a
warning or create a runtime thunk for the undefined function.

Instead in this case we simply use the defined version of the function.
This is possible since checking signatures of dynamic calls happens
at runtime so any invalid usage will still result in a runtime error.

This is needed to allow C++ programs to link without generating
warnings.  Its not uncommon in C++ for vtables to be populated by
function address whee the signature of the function is not known in the
compilation unit.  In this case clang declares the method as void(void)
and relies on the vtable caller casting the data back to the correct

Fixes: https://bugs.llvm.org/show_bug.cgi?id=40412

Differential Revision: https://reviews.llvm.org/D62153

LLVM/llvm 361677llvm/trunk/lib/Target/AArch64 AArch64RegisterBankInfo.cpp AArch64RegisterBankInfo.h

[GlobalISel][AArch64] NFC: Factor out HasFPConstraints into a proper function

Factor it out into a function, and replace places where we had the same check
with the new function.

Differential Revision: https://reviews.llvm.org/D62421

LLVM/llvm 361676lldb/trunk/lldb.xcodeproj/xcshareddata/xcschemes desktop.xcscheme

Revert Xcode scheme changes from 361675 

LLVM/llvm 361675lldb/trunk/source/Plugins/SymbolFile/DWARF DWARFFormValue.cpp SymbolFileDWARF.cpp

Cleanup fixed form sizes.

The fix form sizes use to have two arrays: one for 4 byte addresses and in for 8 byte 
addresses. The table had an issue where DW_FORM_flag_present wasn't being represented as a 
fixed size form because its actual size _is_ zero and zero was used to indicate the form 
isn't fixed in size. Any code that needed to quickly access the DWARF had to get a 
FixedFormSizes instance using the address byte size.

This fix cleans things up by adding a DWARFFormValue::GetFixedSize() both as a static 
method and as a member function on DWARFFormValue. It correctly can indicate if a form 
size is zero. This cleanup is a precursor to a follow up patch where I hope to speed up 
DWARF parsing.

I verified performance doesn't regress by loading hundreds of DWARF files and setting a 
breakpoint by file and line and by name in files that do not have DWARF indexes. 
Performance remained consistent between the two approaches.

Differential Revision: https://reviews.llvm.org/D62416

LLVM/llvm 361674cfe/trunk/test/CodeGen loop-vectorize.c loop-unroll.c

Mark tests as x86.

LLVM/llvm 361673lldb/trunk/include/lldb/Target Process.h

[Target] Make Processes' GetLanguageRuntime non-virtual

LLVM/llvm 361672lldb/trunk/source/Expression DWARFExpression.cpp

[DWARFExpression] Remove commented-out code (NFC)

LLVM/llvm 361671llvm/trunk/include/llvm/DebugInfo DIContext.h, llvm/trunk/lib/DebugInfo/DWARF DWARFDie.cpp

[dwarfdump] Add flag to limit the number of parents DIEs

This adds `-parent-recurse-depth` which limits the number of parent DIEs
being dumped.

Differential revision: https://reviews.llvm.org/D62359

LLVM/llvm 361670cfe/trunk/lib/Sema SemaExpr.cpp, cfe/trunk/test/SemaCXX default1.cpp

Default arguments are potentially constant evaluated.

We need to eagerly instantiate constexpr functions used in them even if
the default argument is never actually used, because we might evaluate
portions of it when performing semantic checks.

LLVM/llvm 361669llvm/trunk/lib/Target TargetMachine.cpp, llvm/trunk/lib/Target/PowerPC PPCISelLowering.cpp PPCCallingConv.td

Implement call lowering without parameters on AIX

This patch implements call lowering for calls without parameters
on AIX as initial support.

Reviewers: sfertile, hubert.reinterpretcast, aheejin, efriedma

Differential Revision: https://reviews.llvm.org/D61948

LLVM/llvm 361668cfe/trunk/lib/Sema SemaExpr.cpp

Refactor use-marking to better match standard terminology. No
functionality change intended.

LLVM/llvm 361667lld/trunk/COFF Chunks.h DLL.cpp

[COFF] De-virtualize Chunk and SectionChunk

Shaves another pointer off of SectionChunk, reducing the size from 96 to
88 bytes, down from 144 before I started working on this. Combined with
D62356, this reduced peak memory usage when linking chrome_child.dll
from 713MB to 675MB, or 5%.

Create NonSectionChunk to provide virtual dispatch to the rest of the
chunk types.

Reviewers: ruiu, aganea

Differential Revision: https://reviews.llvm.org/D62362

LLVM/llvm 361666lldb/trunk/source/Target Process.cpp

[Process] Clean up some logic around LanguageRuntimes

LLVM/llvm 361665llvm/trunk/lib/Target/AArch64 AArch64RegisterBankInfo.cpp, llvm/trunk/test/CodeGen/AArch64/GlobalISel regbank-select.mir

[GlobalISel][AArch64] Improve register bank mappings for G_SELECT

The fcsel and csel instructions differ in only the register banks they work on.

So, they're entirely interchangeable otherwise.

With this in mind, this does two things:

- Teach AArch64RegisterBankInfo to consider the inputs to G_SELECT as well as
  the outputs.
- Teach it to choose the best register bank mapping based off the constraints
  of the inputs and outputs.

The "best" in this case means the one that requires the smallest number of
copies to properly emit a fcsel/csel.

For example, if the inputs are all already going to be on FPRs, we should
emit a fcsel, even if the output is a GPR. This costs one copy to produce the
result, but saves us from copying the inputs into GPRs.

Also update the regbank-select.mir to check that we end up with the right
select instruction.

Differential Revision: https://reviews.llvm.org/D62267

LLVM/llvm 361664cfe/trunk/docs/analyzer checkers.rst, cfe/trunk/include/clang/StaticAnalyzer/Checkers Checkers.td

[Analyzer] Checker for non-determinism caused by iteration of unordered container of 

Summary: Added a checker for non-determinism caused by iterating unordered containers like 
std::unordered_set containing pointer elements.

Reviewers: NoQ, george.karpenkov, whisperity, Szelethus, baloghadamsoftware

Reviewed By: Szelethus

Subscribers: mgorny, xazax.hun, baloghadamsoftware, szepet, rnkovacs, a.sidorin, 
mikhail.ramalho, donat.nagy, dkrupp, jdoerfert, Charusso, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D59279

LLVM/llvm 361663cfe/trunk/cmake/modules FindZ3.cmake

[cmake] Remove old unused version of FindZ3.cmake from clang [NFC]

Summary: This file was moved to llvm in D54978, r356929, but the old
file was never removed.

Reviewed By: beanz

Tags: #clang

Differential Revision: https://reviews.llvm.org/D62343

LLVM/llvm 361662cfe/trunk/test/AST ast-dump-stmt-json.m

Adding an explicit triple to this test to appease build bots.

LLVM/llvm 361661llvm/trunk/lib/Target/AArch64 AArch64InstrInfo.cpp

[AArch64] check for INLINEASM_BR along w/ INLINEASM

It looks like since INLINEASM_BR was created off of INLINEASM, a few
checks for INLINEASM needed to be updated to check for either case.


Reviewers: t.p.northover, peter.smith

Reviewed By: peter.smith

Subscribers: craig.topper, javed.absar, kristof.beyls, hiraditya, llvm-commits, 
peter.smith, srhines

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62402

LLVM/llvm 361660cfe/trunk/include/clang/AST JSONNodeDumper.h, cfe/trunk/lib/AST JSONNodeDumper.cpp

Add JSON dumping tests for ObjC statements; add support for dumping @catch catch-all 

LLVM/llvm 361659llvm/trunk/lib/Target/ARM ARMBaseInstrInfo.cpp Thumb2InstrInfo.cpp

[ARM] additionally check for ARM::INLINEASM_BR w/ ARM::INLINEASM

We were observing failures for arm32 allyesconfigs of the Linux kernel
with the asm goto Clang patch, where ldr's were being generated to
offsets too far away to encode in imm12.

It looks like since INLINEASM_BR was created off of INLINEASM, a few
checks for INLINEASM needed to be updated to check for either case.


Link: https://github.com/ClangBuiltLinux/linux/issues/490

Reviewers: peter.smith, kristof.beyls, ostannard, rengolin, t.p.northover

Reviewed By: peter.smith

Subscribers: jyu2, javed.absar, hiraditya, llvm-commits, nathanchance, craig.topper, kees, 

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62400

LLVM/llvm 361658cfe/trunk/test/OpenMP nvptx_target_requires_unified_shared_memory.cpp

[OpenMP] Add test for requires and unified shared memory clause with declare target link

This patch adds a test for requires with unified share memory clause when a declare target 
link is present.

This test needs to go in prior to changes to declare target link for comparison purposes.

Reviewers: ABataev, caomhin

Reviewed By: ABataev

Subscribers: guansong, jdoerfert, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D62407

LLVM/llvm 361657lld/trunk/COFF Writer.cpp Chunks.h, lld/trunk/test/COFF strtab-size.s

[COFF] Replace OutputSection* with uint16_t index in Chunk

Shaves another 8 bytes off of SectionChunk, the most commonly allocated
type in LLD.

These indices are only valid after we've assigned chunks to output
sections and removed empty sections, so do that in a new pass.

Reviewers: ruiu, aganea

Differential Revision: https://reviews.llvm.org/D62356