LLVM/project 8bfdbb9llvm/lib/Transforms/InstCombine InstCombineShifts.cpp

[InstCombine] Remove redundant shift folds (NFCI) (#90016)

These are already handled by canEvaluateShifted/getShiftedValue (one-use
only), and also in reassociateShiftAmtsOfTwoSameDirectionShifts (also
multi-use), so let's at least get rid of the *third* implementation...
DeltaFile
+0-16llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
+0-161 files

LLVM/project 565bdb5lldb/include/lldb/API SBType.h, lldb/include/lldb/Symbol TypeSystem.h

[lldb] Add SB API to access static constexpr member values (#89730)

The main change is the addition of a new SBTypeStaticField class,
representing a static member of a class. It can be retrieved created
through SBType::GetStaticFieldWithName. It contains several methods
(GetName, GetMangledName, etc.) whose meaning is hopefully obvious. The
most interesting method is
        lldb::SBValue GetConstantValue(lldb::SBTarget)
which returns a the value of the field -- if it is a compile time
constant. The reason for that is that only constants have their values
represented in the clang AST.

For non-constants, we need to go back to the module containing that
constant, and ask retrieve the associated ValueObjectVariable. That's
easy enough if the we are still in the type system of the module
(because then the type system will contain the pointer to the module
symbol file), but it's hard when the type has been copied into another
AST (e.g. during expression evaluation). To do that we would need to
walk the ast import chain backwards to find the source TypeSystem, and I

    [10 lines not shown]
DeltaFile
+88-0lldb/source/API/SBType.cpp
+52-0lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
+33-0lldb/test/API/python_api/type/TestTypeList.py
+32-0lldb/include/lldb/API/SBType.h
+9-0lldb/include/lldb/Symbol/TypeSystem.h
+9-0lldb/source/Symbol/CompilerDecl.cpp
+223-07 files not shown
+251-013 files

LLVM/project d86cc73clang/include/clang/AST DeclID.h DeclCXX.h, clang/lib/AST DeclCXX.cpp

[NFC] [Serialization] Avoid using DeclID directly as much as possible

This patch tries to remove all the direct use of DeclID except the real
low level reading and writing. All the use of DeclID is converted to
the use of LocalDeclID or GlobalDeclID. This is helpful to increase the
readability and type safety.
DeltaFile
+99-112clang/lib/Serialization/ASTReaderDecl.cpp
+95-45clang/include/clang/AST/DeclID.h
+40-37clang/lib/Serialization/ASTWriter.cpp
+38-29clang/lib/AST/DeclCXX.cpp
+38-28lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
+31-28clang/include/clang/AST/DeclCXX.h
+341-27932 files not shown
+583-50938 files

LLVM/project 72b5814clang/include/clang/AST DeclID.h DeclCXX.h, clang/lib/AST DeclCXX.cpp

Revert "[NFC] [Serialization] Avoid using DeclID directly as much as possible"

This reverts commit 42070a5c092ed420bf92ebf38229c594885e94c7.

I forgot to touch lldb.
DeltaFile
+112-99clang/lib/Serialization/ASTReaderDecl.cpp
+45-95clang/include/clang/AST/DeclID.h
+37-40clang/lib/Serialization/ASTWriter.cpp
+29-38clang/lib/AST/DeclCXX.cpp
+28-31clang/include/clang/AST/DeclCXX.h
+25-25clang/include/clang/AST/DeclTemplate.h
+276-32829 files not shown
+479-54335 files

LLVM/project 011a653llvm/lib/Target/RISCV RISCVInsertVSETVLI.cpp, llvm/test/CodeGen/RISCV/rvv vsetvli-insert.mir vsetvli-insert-crossbb.mir

[RISCV] Split out VSETVLIInfo AVL states to be more explicit (#89964)

We currently use AVLIsReg to represent VLMAX as well as a dummy value
for
whenever the VL is ignored by vmv.x.s. This splits them out into
separate
states so that AVLIsReg is always a virtual register and should help
with
tracking the definition inside VSETVLIInfo directly in #89180.

This is almost an NFC but it sets the kill flag for x0 in more places.
DeltaFile
+82-59llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
+10-10llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
+6-6llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
+98-753 files

LLVM/project 2c9e2e9llvm/test/CodeGen/RISCV rv64i-demanded-bits.ll rv64zba.ll, llvm/test/CodeGen/RISCV/rv64-legal-i32 rv64zbb-zbkb.ll rv64zba.ll

[RISCV][ISel] Eliminate `andi rd, rs1, -1` instructions (#89976)

Inspired by https://github.com/llvm/llvm-project/pull/89966, this patch
handles the special case `binop_allwusers<and> GPR:$rs1, 0xffffffff ->
copy $rs1` to avoid creating redundant `andi rd, rs1, -1` instructions.
DeltaFile
+72-158llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll
+32-72llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
+26-32llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbb-zbkb.ll
+14-0llvm/test/CodeGen/RISCV/rv64i-demanded-bits.ll
+0-6llvm/test/CodeGen/RISCV/rv64zba.ll
+0-6llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zba.ll
+144-2742 files not shown
+146-2758 files

LLVM/project 42070a5clang/include/clang/AST DeclID.h DeclCXX.h, clang/lib/AST DeclCXX.cpp

[NFC] [Serialization] Avoid using DeclID directly as much as possible

This patch tries to remove all the direct use of DeclID except the real
low level reading and writing. All the use of DeclID is converted to
the use of LocalDeclID or GlobalDeclID. This is helpful to increase the
readability and type safety.
DeltaFile
+99-112clang/lib/Serialization/ASTReaderDecl.cpp
+95-45clang/include/clang/AST/DeclID.h
+40-37clang/lib/Serialization/ASTWriter.cpp
+38-29clang/lib/AST/DeclCXX.cpp
+31-28clang/include/clang/AST/DeclCXX.h
+25-25clang/include/clang/AST/DeclTemplate.h
+328-27629 files not shown
+543-47935 files

LLVM/project c2a98fdclang/include/clang/AST DeclID.h, clang/include/clang/Serialization ASTBitCodes.h ASTReader.h

[NFC] Move DeclID from serialization/ASTBitCodes.h to AST/DeclID.h (#89873)

Previously, the DeclID is defined in serialization/ASTBitCodes.h under
clang::serialization namespace. However, actually the DeclID is not
purely used in serialization part. The DeclID is already widely used in
AST and all around the clang project via classes like `LazyPtrDecl` or
calling `ExternalASTSource::getExernalDecl()`. All such uses are via the
raw underlying type of `DeclID` as `uint32_t`. This is not pretty good.

This patch moves the DeclID class family to a new header `AST/DeclID.h`
so that the whole project can use the wrapped class `DeclID`,
`GlobalDeclID` and `LocalDeclID` instead of the raw underlying type.
This can improve the readability and the type safety.
DeltaFile
+177-0clang/include/clang/AST/DeclID.h
+4-157clang/include/clang/Serialization/ASTBitCodes.h
+54-72clang/include/clang/Serialization/ASTReader.h
+30-33clang/lib/AST/DeclCXX.cpp
+23-23clang/lib/AST/Decl.cpp
+19-22clang/lib/AST/DeclTemplate.cpp
+307-30725 files not shown
+384-39831 files

LLVM/project fd5f06eclang/test/Interpreter fail.cpp, clang/tools/clang-repl ClangRepl.cpp

[clang-repl] Fix the process return code if diagnostics occurred. (#89879)

Should fix the failure seen in the pre-merge infrastructure of #89804.
DeltaFile
+14-7clang/test/Interpreter/fail.cpp
+9-12clang/tools/clang-repl/ClangRepl.cpp
+23-192 files

LLVM/project 7a77b76llvm/test/Transforms/InstCombine sub.ll

[InstCombine] Add additional multi-use test for sub of gep (NFC)

A case where still performing the fold is clearly profitable.
DeltaFile
+21-0llvm/test/Transforms/InstCombine/sub.ll
+21-01 files

LLVM/project 873889bllvm/lib/Transforms/InstCombine InstCombineCompares.cpp InstructionCombining.cpp

[InstCombine] Extract logic for "emit offset and rewrite gep" (NFC)
DeltaFile
+2-22llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+20-2llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+3-3llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
+1-1llvm/lib/Transforms/InstCombine/InstCombineInternal.h
+26-284 files

LLVM/project 4b10adeclang/lib/Format UnwrappedLineParser.cpp, clang/unittests/Format TokenAnnotatorTest.cpp

[clang-format] Annotate enum braces as BK_Block (#89871)

Fixes #89759.
DeltaFile
+12-12clang/lib/Format/UnwrappedLineParser.cpp
+17-0clang/unittests/Format/TokenAnnotatorTest.cpp
+29-122 files

LLVM/project 865b73allvm/test/Transforms/InstCombine shift.ll

[InstCombine] Add multi-use tests for shift-of-shift transform (NFC)

Also drop irrelevant function attributes from tests.
DeltaFile
+45-19llvm/test/Transforms/InstCombine/shift.ll
+45-191 files

LLVM/project 3b4ba72clang/lib/StaticAnalyzer/Checkers Taint.cpp

[analyzer] Fix performance of getTaintedSymbolsImpl() (#89606)

Previously the function
```
std::vector<SymbolRef> taint::getTaintedSymbolsImpl(ProgramStateRef State,
                                                    const MemRegion *Reg,
                                                    TaintTagType K,
                                                    bool returnFirstOnly)
```
(one of the 4 overloaded variants under this name) was handling element
regions in a highly inefficient manner: it performed the "also examine
the super-region" step twice. (Once in the branch for element regions,
and once in the more general branch for all `SubRegion`s -- note that
`ElementRegion` is a subclass of `SubRegion`.)

As pointer arithmetic produces `ElementRegion`s, it's not too difficult
to get a chain of N nested element regions where this inefficient
recursion would produce 2^N calls.


    [7 lines not shown]
DeltaFile
+6-8clang/lib/StaticAnalyzer/Checkers/Taint.cpp
+6-81 files

LLVM/project 7699b34clang/lib/Format UnwrappedLineParser.cpp, clang/unittests/Format TokenAnnotatorTest.cpp FormatTest.cpp

release/18.x: [clang-format] Fix a regression in annotating BK_BracedInit (#87450)

Backport 7c9c38eaa9b7
DeltaFile
+13-7clang/lib/Format/UnwrappedLineParser.cpp
+13-0clang/unittests/Format/TokenAnnotatorTest.cpp
+12-0clang/unittests/Format/FormatTest.cpp
+38-73 files

LLVM/project f1cbcacclang/lib/Driver/ToolChains Clang.cpp, clang/test/Driver integrated-as.c

[𝘀𝗽𝗿] initial version

Created using spr 1.3.5-bogner
DeltaFile
+10-42clang/lib/Driver/ToolChains/Clang.cpp
+1-1clang/test/Driver/integrated-as.c
+11-432 files

LLVM/project 1858db7llvm/test/CodeGen/X86 gfni-shifts.ll gfni-funnel-shifts.ll, llvm/test/Transforms/AtomicExpand/AMDGPU expand-atomic-rmw-fadd.ll expand-atomic-f32-system.ll

rebase and fix comments

Created using spr 1.3.5
DeltaFile
+3,229-2,410llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd.ll
+3,717-0llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-system.ll
+0-3,478openmp/libomptarget/plugins-nextgen/amdgpu/src/rtl.cpp
+3,478-0offload/plugins-nextgen/amdgpu/src/rtl.cpp
+3,053-32llvm/test/CodeGen/X86/gfni-shifts.ll
+2,726-15llvm/test/CodeGen/X86/gfni-funnel-shifts.ll
+16,203-5,9354,161 files not shown
+218,551-106,9264,167 files

LLVM/project 5ad39e7llvm/test/CodeGen/X86 gfni-shifts.ll gfni-funnel-shifts.ll, llvm/test/Transforms/AtomicExpand/AMDGPU expand-atomic-rmw-fadd.ll expand-atomic-f32-system.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.5

[skip ci]
DeltaFile
+3,229-2,410llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd.ll
+3,717-0llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-system.ll
+3,478-0offload/plugins-nextgen/amdgpu/src/rtl.cpp
+0-3,478openmp/libomptarget/plugins-nextgen/amdgpu/src/rtl.cpp
+3,053-32llvm/test/CodeGen/X86/gfni-shifts.ll
+2,726-15llvm/test/CodeGen/X86/gfni-funnel-shifts.ll
+16,203-5,9354,160 files not shown
+218,542-106,9204,166 files

LLVM/project 090c92ebolt/include/bolt/Rewrite RewriteInstance.h, bolt/lib/Rewrite RewriteInstance.cpp

[BOLT] Emit synthetic FILE symbol for local cold fragments of global symbols (#89794)

DeltaFile
+16-0bolt/lib/Rewrite/RewriteInstance.cpp
+3-0bolt/include/bolt/Rewrite/RewriteInstance.h
+1-0bolt/test/X86/cdsplit-symbol-names.s
+20-03 files

LLVM/project 10661baclang/include/clang/CIR CMakeLists.txt, clang/include/clang/CIR/Dialect/IR CIRDialect.td CIROps.td

[CIR][NFC] Add scaffolding for the CIR dialect and CIROps.td

This adds no real content, it just incrementally adds some scaffolding
necessary to enable a future patch to just add our first few ops.

Test Plan:
```
$ cmake -Sllvm -Bbuild -DCLANG_ENABLE_CIR=1 \
  -DLLVM_ENABLE_PROJECTS='clang;mlir' \
  -DCMAKE_BUILD_TYPE=Release -GNinja
$ ninja -C build check-clang
$ ninja -C build MLIRCIROpsIncGen
$ ninja -C build MLIRCIR
```

Reviewers: AaronBallman, erichkeane, bcardosolopes

Reviewed By: erichkeane, AaronBallman, bcardosolopes

Pull Request: https://github.com/llvm/llvm-project/pull/86080
DeltaFile
+44-0clang/include/clang/CIR/Dialect/IR/CIRDialect.td
+19-0clang/include/clang/CIR/Dialect/IR/CIROps.td
+16-0clang/include/clang/CIR/Dialect/IR/CMakeLists.txt
+16-0clang/include/clang/CIR/Dialect/IR/CIRDialect.h
+13-0clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+6-0clang/include/clang/CIR/CMakeLists.txt
+114-05 files not shown
+127-011 files

LLVM/project d6cc8d4clang/cmake/caches VectorEngine.cmake

[buildbot] VE builders: disable ctx_profile (#89969)

DeltaFile
+2-0clang/cmake/caches/VectorEngine.cmake
+2-01 files

LLVM/project 1b54805lldb/docs/resources test.rst

[lldb][docs] Update instructions for debugging API tests (#89979)

DeltaFile
+3-3lldb/docs/resources/test.rst
+3-31 files

LLVM/project 9191878llvm/lib/Target/PowerPC PPCAsmPrinter.cpp

[PowerPC] Use `SmallSetVector` to enable deterministic build (#89875)

This is to address the issue in
https://lab.llvm.org/buildbot/#/builders/54.
`SmallSetVector` interfaces as set and can be iterated in a
deterministic order.
DeltaFile
+2-2llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+2-21 files

LLVM/project 1d77eb4llvm/test/CodeGen/PowerPC legalize-vaarg.ll

Revert "[PPC] [NFC] add testcase for more store forwarding"

This reverts commit 29c7d1a60c9d45e82f08cd7487178846ed5f9c6d.
The store forwarding patch https://github.com/llvm/llvm-project/pull/87465
is closed.
DeltaFile
+0-17llvm/test/CodeGen/PowerPC/legalize-vaarg.ll
+0-171 files

LLVM/project a6bdd6dllvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 mul_pow2.ll

[AArch64][SelectionDAG] Lower multiplication by a constant to shl+add+shl+add

Change the costmodel to lower a = b * C where C = (1 + 2^m) * 2^n + 1 to
          add   w8, w0, w0, lsl #m
          add   w0, w0, w8, lsl #n
Note: The latency of add can vary depending on the shirt amount
      They are cheap as a move when the shift amounts is 4 or less.
Fix part of https://github.com/llvm/llvm-project/issues/89430
DeltaFile
+55-2llvm/test/CodeGen/AArch64/mul_pow2.ll
+33-2llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+88-42 files

LLVM/project a35d7d7llvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 mul_pow2.ll

[AArch64][SelectionDAG] Correct the shift amounts bound

Accord D152827, when the shift amounts is 4 or less, they are
cheap as a move.
DeltaFile
+3-4llvm/test/CodeGen/AArch64/mul_pow2.ll
+2-2llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+5-62 files

LLVM/project d530894clang/lib/Sema SemaDecl.cpp JumpDiagnostics.cpp, clang/test/AST ast-dump-recovery.cpp

[clang][Sema] Preserve the initializer of invalid VarDecls (#88645)

Fixes https://github.com/clangd/clangd/issues/1821
DeltaFile
+17-6clang/lib/Sema/SemaDecl.cpp
+8-0clang/test/AST/ast-dump-recovery.cpp
+2-1clang/lib/Sema/JumpDiagnostics.cpp
+27-73 files

LLVM/project 98181cfllvm/include/llvm/Support LEB128.h, llvm/unittests/Support LEB128Test.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.5-bogner
DeltaFile
+8-4llvm/include/llvm/Support/LEB128.h
+12-0llvm/unittests/Support/LEB128Test.cpp
+20-42 files

LLVM/project 0a991acbolt/lib/Rewrite RewriteInstance.cpp, bolt/test/RISCV fake-label-no-entry.c unnamed-sym-no-entry.c

[𝘀𝗽𝗿] initial version

Created using spr 1.3.5-bogner
DeltaFile
+18-0bolt/test/RISCV/fake-label-no-entry.c
+0-18bolt/test/RISCV/unnamed-sym-no-entry.c
+0-6bolt/lib/Rewrite/RewriteInstance.cpp
+18-243 files

LLVM/project b9f2c16llvm/test/DebugInfo/LoongArch dwarf-loongarch-relocs.ll, llvm/test/DebugInfo/RISCV dwarf-riscv-relocs.ll

[MC] Rename temporary symbols of empty name to ".L0 " (#89693)

Temporary symbols generated for .eh_frame and .debug_line have an empty
name, which appear in .symtab in the presence of RISC-V style linker
relaxation and will not be discarded by ld/objcopy --discard-locals
(-X).

In contrast, GNU assembler's riscv port assigns a fake name ".L0 " (with
a trailing space) to these symbols so that will be discarded by
ld/objcopy --discard-locals.

This patch matches the GNU behavior. Since Clang's RISC-V targets pass
-X to ld, and GNU ld defaults to -X for RISC-V targets, these ".L0 "
symbols will be discarded after linking by default, as expected by
users.

The llvm-symbolizer special case for RISC-V `SF_FormatSpecific` symbols
https://reviews.llvm.org/D98669 needs to be adjusted.

Note: `"":` in assembly currently crashes.
DeltaFile
+26-6llvm/test/MC/RISCV/cfi-advance.s
+27-0llvm/test/DebugInfo/Symbolize/ELF/riscv-temporary-symbol.s
+13-13llvm/test/MC/ELF/RISCV/gen-dwarf.s
+0-26llvm/test/DebugInfo/Symbolize/ELF/riscv-empty-name-symbol.s
+9-9llvm/test/DebugInfo/LoongArch/dwarf-loongarch-relocs.ll
+6-6llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
+81-609 files not shown
+103-7715 files