LLVM/llvm 369669lldb/trunk/include/lldb lldb-enumerations.h

Doxygenify comments.

LLVM/llvm 369668cfe/trunk/lib/Sema SemaDecl.cpp SemaOpenMP.cpp

[OPENMP]Generalization of handling of declare target attribute.

Used OMPDeclareTargetDeclAttr::isDeclareTargetDeclaration instead of
direct checking of the OMPDeclareTargetDeclAttr attribute.

LLVM/llvm 369667llvm/trunk/test/Transforms/InstCombine unrecognized_three-way-comparison.ll

[NFC][InstCombine] New tests: unrecognized_three-way-comparison.ll is ignorant about 
commutative variants

D66232 "exposes" the problem.

LLVM/llvm 369666clang-tools-extra/trunk/clangd/unittests TweakTesting.cpp

Fixed Missing Expected error handling

LLVM/llvm 369665llvm/trunk/lib/Target/X86 X86MCInstLower.cpp

[X86] Remove MCInstLower code that drops operands from some CALL and TAILJMP instructions. 
Add asserts to verify operand count

It appears the FIXME here was handled at some point. r159728 from 2012 seems to be at 
least aportion of fixing it.

Differential Revision: https://reviews.llvm.org/D66570

LLVM/llvm 369664llvm/trunk/lib/CodeGen MachineBlockPlacement.cpp, llvm/trunk/test/CodeGen/PowerPC atomics-regression.ll

[MBP] Disable aggressive loop rotate in plain mode

Patch https://reviews.llvm.org/D43256 introduced more aggressive loop layout optimization 
which depends on profile information. If profile information is not available, the 
statically estimated profile information(generated by BranchProbabilityInfo.cpp) is used. 
If user program doesn't behave as BranchProbabilityInfo.cpp expected, the layout may be 

To be conservative this patch restores the original layout algorithm in plain mode. But 
user can still try the aggressive layout optimization with 

Differential Revision: https://reviews.llvm.org/D65673

LLVM/llvm 369663llvm/branches release_90, llvm/branches/release_90/lib/Target/Mips/AsmParser MipsAsmParser.cpp

Merging r367580:
r367580 | atanasyan | 2019-08-01 18:04:29 +0200 (Thu, 01 Aug 2019) | 18 lines

[mips] Fix lowering load/store instruction in PIC case

If an operand of the `lw/sw` instructions is a symbol, these instructions
incorrectly lowered using not-position-independent chain of commands.
For PIC code we should use `lw/addiu` instructions with the `R_MIPS_GOT16`
and `R_MIPS_LO16` relocations respectively. Instead of that LLVM generates
position dependent code with the `R_MIPS_HI16` and `R_MIPS_LO16`

This patch provides a fix for the bug by handling PIC case separately in
the `MipsAsmParser::expandMemInst`. The main idea is to generate a chain
of PIC instructions to load a symbol address into a register and then
load the address content.

The fix is not optimal and does not fix all PIC-related problems. This
is a task for subsequent patches.

Differential Revision: https://reviews.llvm.org/D65524

LLVM/llvm 369662llvm/trunk/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/trunk/test/CodeGen/PowerPC qpx-recipest.ll

[DAGCombiner] Remove explicit call to AddToWorklist in sqrt and reciprocal computations

Summary: These nodes end up being processed regardless due to DAGCombiner ensuring 
arguments are processed. This changes the order in which nodes are processed, which fixes 
an issue on PowerPC.

Reviewers: craig.topper, efriedma, RKSimon, lebedev.ri, mcberg2017, stefanp, hfinkel

Subscribers: nemanjai, MaskRay, jsji, steven.zhang, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66548

LLVM/llvm 369661llvm/trunk/test/tools/llvm-mca/X86/BtVer2 resources-x86_64.s xadd.s

[X86][BtVer2] Fix latency/throughput of scalar integer MUL instructions.

Single operand MUL instructions that implicitly set EAX have the following
latency/throughput profile (see below):

imul %cl              # latency: 3cy - uOPs: 1 - 1 JMul
imul %cx              # latency: 3cy - uOPs: 3 - 3 JMul
imul %ecx             # latency: 3cy - uOPs: 2 - 2 JMul
imul %rcx             # latency: 6cy - uOPs: 2 - 4 JMul

mul %cl               # latency: 3cy - uOPs: 1 - 1 JMul
mul %cx               # latency: 3cy - uOPs: 3 - 3 JMul
mul %ecx              # latency: 3cy - uOPs: 2 - 2 JMul
mul %rcx              # latency: 6cy - uOPs: 2 - 4 JMul

Excluding the 64bit variant, which has a latency of 6cy, every other instruction
has a latency of 3cy. However, the number of decoded macro-opcodes (as well as
the resource cyles) depend on the MUL size.

The two operand MULs have a more predictable profile (see below):

imul %dx, %dx         # latency: 3cy - uOPs: 1 - 1 JMul
imul %edx, %edx       # latency: 3cy - uOPs: 1 - 1 JMul
imul %rdx, %rdx       # latency: 6cy - uOPs: 1 - 4 JMul

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LLVM/llvm 369660lldb/trunk/source/Commands CommandObjectProcess.cpp

[lldb] Remove ')' to fix the build

That ')' slipped in by accident in the reformatting commit.

LLVM/llvm 369659llvm/trunk/test/CodeGen/PowerPC qpx-recipest.ll

[PowerPC] Regenerate reciprocal tests, as discussed on D66548

LLVM/llvm 369658llvm/trunk/lib/Target/PowerPC PPCISelLowering.cpp PPCRegisterInfo.td

[PowerPC] Add combined ELF ABI and 32/64 bit queries to the subtarget. [NFC]

A lot of places in the code combine checks for both ABI (SVR4/Darwin/AIX) and
addressing mode (64-bit vs 32-bit). In an attempt to make some of the code more
readable I've added a couple functions that combine checking for the ELF abi and
64-bit/32-bit code at once. As we add more AIX support I intend to add similar
functions for the AIX ABI.

Differential Revision: https://reviews.llvm.org/D65814

LLVM/llvm 369657llvm/trunk/include/llvm/MC MCSymbolXCOFF.h, llvm/trunk/lib/MC XCOFFObjectWriter.cpp

[PowerPC][XCOFF][MC] Explicitly set containing csect on symbols. [NFC]

Previously we would get the csect a symbol was contained in through its
fragment. This works only if we are writing an object file, and only for
defined symbols. To fix this we set the contating csect explicitly on the
MCSymbolXCOFF object.

Differential Revision: https://reviews.llvm.org/D66032

LLVM/llvm 369656clang-tools-extra/trunk/clangd ClangdLSPServer.cpp

[clangd] Send suppported codeActionKinds to the client.

This would make client know which codeActionKinds that clangd may

VSCode will add a new entry "Refactor..." (which shows all
refactoring-kind code actions) in the right-click menu.

Reviewers: ilya-biryukov

Subscribers: MaskRay, jkorous, arphaman, kadircet, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D66592

LLVM/llvm 369655lldb/trunk/source/Plugins/Language/CPlusPlus CPlusPlusLanguage.cpp

[lldb] Fix `TestDataFormatterStdList` regression

Since D66174 I see failures of TestDataFormatterStdList in about 50% of runs on
Fedora 30 x86_64 libstdc++. I have found out that LLDB internally expects these
RegularExpressions to be matched in their alphabetical order:
        ^std::(__cxx11::)?list<.+>(( )?&)?$
        ^std::__[[:alnum:]]+::list<.+>(( )?&)?$

But since D66174 they are sometimes matched in reverse order. In fact it was
only some luck it worked before as there is internally
std::map<lldb::RegularExpressionSP, FormatterImpl> (FormattersContainer).

Differential Revision: https://reviews.llvm.org/D66398

LLVM/llvm 369654llvm/branches/release_90/lib/Target TargetMachine.cpp, llvm/branches/release_90/lib/Target/X86 X86Subtarget.cpp

Merging r369426 and r369443:

r369426 | mstorsjo | 2019-08-20 20:58:05 +0200 (Tue, 20 Aug 2019) | 5 lines

[TargetMachine] Don't try to create COFFSTUB references on windows on non-COFF

This avoids spurious relocation types for windows/elf targets.

Differential Revision: https://reviews.llvm.org/D66401

r369443 | mstorsjo | 2019-08-20 22:58:02 +0200 (Tue, 20 Aug 2019) | 11 lines

[test] Fix tests when run on windows after SVN r369426. NFC.

When running tests on windows, invoking "llc -march=<arch>" will
implicitly use windows as the target os, making these tests misbehave
after this change.

Fix the issue by using more specific -mtriple values instead of plain
-march in these tests.

This should hopefully fix buildbot failures like

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LLVM/llvm 369653llvm/trunk/include/llvm/Transforms/IPO Attributor.h, llvm/trunk/lib/Transforms/IPO Attributor.cpp

[Attributor][NFC] Move DerefState to header and use StateWrapper

Summary: In D65402, I want to get DerefState from AADereferenceable but it was not 
allowed. This patch moves DerefState definition into Attributor.h and makes 
AADerefenceable inherit StateWrapper.

Reviewers: jdoerfert, sstefan1

Reviewed By: jdoerfert

Subscribers: hiraditya, jfb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66585

LLVM/llvm 369652lldb/trunk/source/Commands CommandObjectProcess.cpp

[lldb][NFC] Fix indentation in CommandObjectProcess

LLVM/llvm 369651llvm/branches release_90, llvm/branches/release_90/include/llvm/IR InlineAsm.h

Merging r369095:
r369095 | lewis-revill | 2019-08-16 12:28:34 +0200 (Fri, 16 Aug 2019) | 11 lines

[RISCV] Lower inline asm constraint A for RISC-V

This allows arguments with the constraint A to be lowered to input nodes
for RISC-V, which implies a memory address stored in a register.

This patch adds the minimal amount of code required to get operands with
the right constraints to compile.



LLVM/llvm 369650llvm/trunk/lib/CodeGen MachineBasicBlock.cpp, llvm/trunk/test/Other print-slotindexes.ll

[SlotIndexes] Add print-slotindexes to disable printing slotindexes

When we print the IR with --print-after/before-*,
SlotIndexes will be printed whenever available (We haven't freed it).

This introduces some noises when we try to compare the IR
among different optimizations.

-print-before=machine-cp will print SlotIndexes for 1st machine-cp
pass, but NOT for 2nd machine-cp;
-print-after=machine-cp will NOT print SlotIndexes for both
machine-cp passes.
So SlotIndexes in 1st pass introduce noises when differing these IRs.

This patch introduces an option to hide indexes.

Reviewers: stoklund, thegameg, qcolombet

Reviewed By: thegameg

Subscribers: hiraditya, arphaman, llvm-commits

Tags: #llvm

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LLVM/llvm 369649cfe/branches release_90, cfe/branches/release_90/lib/Basic/Targets RISCV.cpp

Merging r369093:
r369093 | lewis-revill | 2019-08-16 12:23:56 +0200 (Fri, 16 Aug 2019) | 11 lines

[RISCV] Add inline asm constraint A for RISC-V

This allows the constraint A to be used in inline asm for RISC-V, which
allows an address held in a register to be used.

This patch adds the minimal amount of code required to get operands with
the right constraints to compile.

Differential Revision: https://reviews.llvm.org/D54295


LLVM/llvm 369648llvm/trunk/include/llvm/MCA Instruction.h, llvm/trunk/include/llvm/MCA/HardwareUnits RegisterFile.h

[MCA] consistently use MCPhysReg instead of unsigned as register type. NFCI

LLVM/llvm 369647cfe/trunk/docs ReleaseNotes.rst, cfe/trunk/include/clang/Driver CLCompatOptions.td

Revert r369402 "win: Enable /Zc:twoPhase by default if targeting MSVC 2017 update 3 or 

This broke compiling some ASan tests with never versions of MSVC/the Win
SDK, see https://crbug.com/996675

> MSVC 2017 update 3 (_MSC_VER 1911) enables /Zc:twoPhase by default, and
> so should clang-cl:
> https://docs.microsoft.com/en-us/cpp/build/reference/zc-twophase
> clang-cl takes the MSVC version it emulates from the -fmsc-version flag,
> or if that's not passed it tries to check what the installed version of
> MSVC is and uses that, and failing that it uses a default version that's
> currently 1911. So this changes the default if no -fmsc-version flag is
> passed and no installed MSVC is detected. (It also changes the default
> if -fmsc-version is passed or MSVC is detected, and either indicates
> _MSC_VER >= 1911.)
> As mentioned in the MSDN article, the Windows SDK header files in
> version 10.0.15063.0 (Creators Update or Redstone 2) and earlier
> versions do not work correctly with /Zc:twoPhase. If you need to use
> these old SDKs with a new clang-cl, explicitly pass /Zc:twoPhase- to get
> the old behavior.
> Fixes PR43032.

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LLVM/llvm 369646lldb/trunk/packages/Python/lldbsuite/test/functionalities/target_command TestTargetCommand.py

[lldb][NFC] Add test for target stop-hook disable/enable/delete

LLVM/llvm 369645llvm/trunk/lib/ObjectYAML ELFEmitter.cpp, llvm/trunk/test/tools/llvm-readobj demangle.test

[yaml2obj] - Lookup relocation symbols in dynamic symbol when .dynsym referenced.

This fixes https://bugs.llvm.org/show_bug.cgi?id=40337.

Previously, it was always assumed that relocations referenced symbols in the static symbol 
Now, if the Link field references a section called ".dynsym" it will look up these symbols
in the dynamic symbol table.

This patch is heavily based on D59097 by James Henderson

Differential revision: https://reviews.llvm.org/D66532

LLVM/llvm 369644llvm/trunk/docs/CommandGuide llvm-ranlib.rst llvm-size.rst

Fix some regressions caused by r369553 on old versions of Debian and Ubuntu
It was causing some errors like:

Encoding error:
'ascii' codec can't decode byte 0xe2 in position 341: ordinal not in range(128)
The full traceback has been saved in /tmp/sphinx-err-y2fq4dtb.log, if you want to report 
the issue to the developers.

LLVM/llvm 369643clang-tools-extra/trunk/clang-tidy ClangTidyOptions.h ClangTidyDiagnosticConsumer.h, clang-tools-extra/trunk/clang-tidy/modernize LoopConvertUtils.cpp LoopConvertUtils.h

Remove \brief commands from doxygen comments.

We've been running doxygen with the autobrief option for a couple of
years now. This makes the \brief markers into our comments
redundant. Since they are a visual distraction and we don't want to
encourage more \brief markers in new code either, this patch removes
them all.

Patch produced by

  for i in $(git grep -l '\\brief'); do perl -pi -e 's/\\brief //g' $i & done

[This is analogous to LLVM r331272 and CFE r331834]

Subscribers: srhines, nemanjai, javed.absar, kbarton, MaskRay, jkorous, arphaman, jfb, 
kadircet, jsji, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D66578

LLVM/llvm 369642llvm/trunk/lib/Target/X86 X86ScheduleBtVer2.td, llvm/trunk/test/tools/llvm-mca/X86/BtVer2 xadd.s resources-x86_64.s

[X86][BtVer2] Fix latency and throughput of XCHG and XADD.

On Jaguar, XCHG has a latency of 1cy and decodes to 2 macro-opcodes. Maximum
throughput for XCHG is 1 IPC. The byte exchange has worse latency and decodes to
1 extra uOP; maximum observed throughput is 0.5 IPC.

xchgb %cl, %dl           # Latency: 2cy  -  uOPs: 3  -  2 ALU
xchgw %cx, %dx           # Latency: 1cy  -  uOPs: 2  -  2 ALU
xchgl %ecx, %edx         # Latency: 1cy  -  uOPs: 2  -  2 ALU
xchgq %rcx, %rdx         # Latency: 1cy  -  uOPs: 2  -  2 ALU

The reg-mem forms of XCHG are atomic operations with an observed latency of
16cy.  The resource usage is similar to the XCHGrr variants. The biggest
difference is obviously the bus-locking, which prevents the LS to issue other
memory uOPs in parallel until the unlocking store uOP is executed.

xchgb %cl, (%rsp)        # Latency: 16cy  -  uOPs: 3 - ECX latency: 11cy
xchgw %cx, (%rsp)        # Latency: 16cy  -  uOPs: 3 - ECX latency: 11cy
xchgl %ecx, (%rsp)       # Latency: 16cy  -  uOPs: 3 - ECX latency: 11cy
xchgq %rcx, (%rsp)       # Latency: 16cy  -  uOPs: 3 - ECX latency: 11cy

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LLVM/llvm 369641cfe/trunk/lib/Headers opencl-c.h

[OpenCL] Fix declaration of enqueue_marker

Differential Revision: https://reviews.llvm.org/D66512

LLVM/llvm 369640llvm/trunk/include/llvm/Support MachineValueType.h, llvm/trunk/lib/Target/X86 X86ISelLowering.cpp

[MVT] Add MVT equivalent to EVT::getHalfNumVectorElementsVT() helper. NFCI.

Allows for some cleanup in a lot of SSE/AVX vector splitting code

LLVM/llvm 369639libcxx/branches release_90, libcxx/branches/release_90/include __threading_support

Merging r369537:
r369537 | davidspickett | 2019-08-21 17:38:24 +0200 (Wed, 21 Aug 2019) | 7 lines

[libcxx] Only declare contents of threading API when

When it is defined they will be declared by the
__external_threading header instead.

Differential revision: https://reviews.llvm.org/D66518

LLVM/llvm 369638llvm/trunk/lib/Target/ARM ARMISelLowering.cpp, llvm/trunk/test/CodeGen/ARM shift_parts.ll

Reapply: [ARM] Fix lsrl with a 128/256 bit shift amount or a shift of 32

The CodeGen/Thumb2/mve-vaddv.ll test needed to be amended to reflect the
changes from the above patch.

This reverts commit cd53ff6, reapplying 7c6b229.

LLVM/llvm 369637llvm/trunk/lib/Transforms/Utils LoopUnrollPeel.cpp, llvm/trunk/test/Transforms/LoopUnroll peel-loop-inner.ll

[Loop Peeling] Fix silly bug in metadata update.

We must update loop metedata before we moved to parent loop if
it is present.

LLVM/llvm 369636llvm/trunk/lib/Target/ARM ARMISelLowering.cpp, llvm/trunk/test/CodeGen/ARM shift_parts.ll

Revert r369626 "[ARM] Fix lsrl with a 128/256 bit shift amount or a shift of 32"

It broke the bots, see e.g. 

> This patch fixes shifts by a 128/256 bit shift amount. It also fixes
> codegen for shifts of 32 by delegating to LLVM's default optimisation
> instead of emitting a long shift.
> Tests that used to generate long shifts of 32 are updated to check for the
> more optimised codegen.
> Differential revision: https://reviews.llvm.org/D66519
> llvm-svn: 369626

LLVM/llvm 369635lldb/trunk/include/lldb/Interpreter Options.h, lldb/trunk/source/Commands CommandObjectPlatform.cpp CommandObjectProcess.cpp

[lldb][NFC] Remove unused return value from HandleOptionArgumentCompletion

LLVM/llvm 369634llvm/trunk/test/tools/llvm-objdump section-filter.test

[llvm-objdump] - Remove an outdated "FIXME". NFC.

The bug mentioned in this test case was fixed in D63779 (r364955),
which also provides a test case.

LLVM/llvm 369633cfe/trunk/lib/CodeGen CGDebugInfo.cpp CGDeclCXX.cpp, cfe/trunk/test/CodeGenCXX debug-info-atexit-stub.cpp debug-info-global-ctor-dtor.cpp

Revert r369458 "[DebugInfo] Add debug location to dynamic atexit destructor"

It causes the build to fail with

"inlinable function call in a function with debug info must have a !dbg location"

in Chromium. See llvm-commits thread for more info.

(This also reverts the follow-up in r369474.)

> Fixes PR43012
> Differential Revision: https://reviews.llvm.org/D66328

LLVM/llvm 369632lldb/trunk/source/Commands CommandObjectPlatform.cpp CommandObjectProcess.cpp, lldb/trunk/source/Interpreter OptionValueUUID.cpp

[lldb][NFC] NFC cleanup for the completion code

LLVM/llvm 369631clang-tools-extra/trunk/clangd ClangdServer.h

[clangd] The ClangdServer::EnableHiddenFeatures is not used any more.

Remove it.

LLVM/llvm 369630llvm/trunk/tools/llvm-readobj COFFDumper.cpp llvm-readobj.cpp

[llvm-readobj] - Remove `reportError(std::error_code EC, StringRef Input)` helper.

We do not need it, std::error_code is used mostly for COFF and
this patch rewrites the calls to use a different overload.

Having reportError(std::error_code EC, ... is excessive by itself,
because API that use error codes actually needs refactoring to
use Error/Expected<> instead.

DIfferential revision: https://reviews.llvm.org/D66521

LLVM/llvm 369629cfe/trunk/lib/StaticAnalyzer/Checkers CastValueChecker.cpp

Remove an unused function, suppress -Wunused-function warning.

LLVM/llvm 369628llvm/trunk/lib/Target/X86 X86TargetTransformInfo.cpp, llvm/trunk/test/Analysis/CostModel/X86 sitofp.ll cast.ll

[X86] Lower the cost of v2i32->v2f64 sint_to_fp under vector widening legalization.

I don't really understand the costs we're using for fp_to_sint,
but prior to widening legalization we used 20 as the cost for this
via the v2i64->v2f64 entry. That number seems better than the 40
we got with widening legalization. So now we need either a
v2i32->v2f64 entry or a v4i32->v2f64 entry depending on whether
AVX is enabled or not since we skip the first SSE2 table look up
under AVX.

LLVM/llvm 369627llvm/trunk/include/llvm/Support FileSystem.h, llvm/trunk/lib/Support MemoryBuffer.cpp

[Support] Improve readNativeFile(Slice) interface

There was a subtle, but pretty important difference between the Slice
and regular versions of this function. The Slice function was
zero-initializing the rest of the buffer when the read syscall returned
less bytes than expected, while the regular function did not.

This patch removes the inconsistency by making both functions *not*
zero-initialize the buffer. The zeroing code is moved to the
MemoryBuffer class, which is currently the only user of this code. This
makes the API more consistent, and the code shorter.

While in there, I also refactor the functions to return the number of
bytes through the regular return value (via Expected<size_t>) instead of
a separate by-ref argument.

Reviewers: aganea, rnk

Subscribers: kristina, Bigcheese, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66471

LLVM/llvm 369626llvm/trunk/lib/Target/ARM ARMISelLowering.cpp, llvm/trunk/test/CodeGen/ARM shift_parts.ll

[ARM] Fix lsrl with a 128/256 bit shift amount or a shift of 32

This patch fixes shifts by a 128/256 bit shift amount. It also fixes
codegen for shifts of 32 by delegating to LLVM's default optimisation
instead of emitting a long shift.

Tests that used to generate long shifts of 32 are updated to check for the
more optimised codegen.

Differential revision: https://reviews.llvm.org/D66519

LLVM/llvm 369625lldb/trunk/source/Commands CommandObjectType.cpp CommandObjectBreakpoint.cpp

[lldb][NFC] Remove dead code that is supposed to handle invalid command options

We currently have a bunch of code that is supposed to handle invalid command options, but
all this code is unreachable because invalid options are already handled in 
The only way we can reach this code is when we declare but then not implement an option
(which will be made impossible with D65386, which is also when we can completely remove
the `default` cases).

This patch replaces all this code with `llvm_unreachable` to make clear this is dead code
that can't be reached.

Reviewers: JDevlieghere

Reviewed By: JDevlieghere

Subscribers: lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D66522

LLVM/llvm 369624lldb/trunk/include/lldb/Interpreter CommandCompletions.h, lldb/trunk/source/Commands CommandCompletions.cpp CommandObjectSettings.cpp

[lldb][NFC] Remove WordComplete mode, make result array indexed from 0 and remove any 
undocumented/redundant return values

We still have some leftovers of the old completion API in the internals of
LLDB that haven't been replaced by the new CompletionRequest. These leftovers

* The return values (int/size_t) in all completion functions.
* Our result array that starts indexing at 1.
* `WordComplete` mode.

I didn't replace them back then because it's tricky to figure out what exactly they
are used for and the completion code is relatively untested. I finally got around
to writing more tests for the API and understanding the semantics, so I think it's
a good time to get rid of them.

A few words why those things should be removed/replaced:

* The return values are really cryptic, partly redundant and rarely documented.
  They are also completely ignored by Xcode, so whatever information they contain will end 
  breaking Xcode's completion mechanism. They are also partly impossible to even implement
  as we assign negative values special meaning and our completion API sometimes returns 

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LLVM/llvm 369623compiler-rt/trunk/lib/gwp_asan stack_trace_compressor_fuzzer.cpp CMakeLists.txt

Revert "[GWP-ASan] Remove c++ standard lib dependency."

This reverts commit r369606: this doesn't addressed the underlying
problem and it's not the correct solution.

LLVM/llvm 369622llvm/trunk/include/llvm/CodeGen TargetLowering.h, llvm/trunk/lib/CodeGen/SelectionDAG LegalizeFloatTypes.cpp LegalizeIntegerTypes.cpp

[TargetLowering] Remove optional arguments passing to makeLibCall

The patch introduces MakeLibCallOptions struct as suggested by @efriedma on D65497.
The struct contain argument flags which will pass to makeLibCall function.
The patch should not has any functionality changes.

Differential Revision: https://reviews.llvm.org/D65795

LLVM/llvm 369621lldb/trunk/tools/debugserver/source/MacOSX/DarwinLog DarwinLogCollector.cpp

[debugserver] Switch back to std::once_flag

We cannot use llvm::once_flag in debugserver because doesn't link
against llvm.

LLVM/llvm 369620llvm/trunk/utils/lit/lit TestRunner.py, llvm/trunk/utils/lit/tests shtest-env.py

[lit] Diagnose insufficient args to internal env

Without this patch, failing to provide a subcommand to lit's internal
`env` results in either a python `IndexError` or an attempt to execute
the final `env` argument, such as `FOO=1`, as a command.  This patch
diagnoses those cases with a more helpful message.

Reviewed By: stella.stamenova

Differential Revision: https://reviews.llvm.org/D66482